From 25d1f4326cce046b245cd224f3e6335c1a6f76b0 Mon Sep 17 00:00:00 2001 From: Max Christian Pohle Date: Thu, 25 May 2017 19:45:15 +0200 Subject: DCF signal recognized and shown --- inc/int/dcf77.c | 139 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ inc/int/dcf77.h | 69 ++++++++++++++++++++++++++++ 2 files changed, 208 insertions(+) create mode 100755 inc/int/dcf77.c create mode 100755 inc/int/dcf77.h (limited to 'inc') diff --git a/inc/int/dcf77.c b/inc/int/dcf77.c new file mode 100755 index 0000000..13af50d --- /dev/null +++ b/inc/int/dcf77.c @@ -0,0 +1,139 @@ +// vim:set et sw=2 ts=2 tw=120: +#include "dcf77.h" + +// returns -1 on error +unsigned char getBits(const DCF start, const char len) +{ + static const unsigned char mult[] = {1, 2, 4, 8, 10, 20 ,40 ,80}; + /// unsigned char p = 1; //parity + unsigned char r = 0; // retval + unsigned char i; + for(i=0; i= 1000) // one second + { + t_current.ms = 0; // restart + if (++t_current.s > 59) // one minute + { + t_current.s = 0; // restart + if (++t_current.m > 59) // one hour + { + t_current.m = 0; // restart + if (++t_current.h > 23) // one day + { + t_current.h = 0; // restart + t_current.dd++; + } + } + } + } +} + +ISR(INT0_vect) +{ +} + +ISR(PCINT0_vect) +{ + interval = 1; + /// stdout_put_int(interval, uart_putc); + /// stdout_put_string("INT0 call\n", uart_putc); + // cli(); + + // if(INT0_CONTROL == INT0_RISING_EDGE) + // if(MCUCR & (1< 1000 && interval < 2000) // 59th second - no rising edge at the beginning + { + /// if(dcf77_bit == 59) // check if every bit has been transfered + // set_dcf_value(); // completely received- apply new time data + + // 59th second: synchronize with receiver... + TCNT0 = 0; + dcf77_bit = 0; + t_current.s = 0; + t_current.ms = 0; + // t_current.us = 0; + // falling edge causes interrupt... + // MCUCR &= ~(1 << ISC00); + // MCUCR |= (1 << ISC01); + // INT0_CONTROL = INT0_FALLING_EDGE; + } + else // INT0_FALLING_EDGE + { + dcf77[dcf77_bit++].bit = interval >= 200 ? 1 : 0; + + // rising edge causes interrupt... + // MCUCR |= (1 << ISC00); + // MCUCR |= (1 << ISC01); + // INT0_CONTROL = INT0_RISING_EDGE; + // interval = 0; // reset interval to count next interval + } + + interval = 0; + // sei(); +} + +/* +void timer_init() +{ + // 7372800/8 + // >>>>>> DDRD &= ~((1< + #include + + #include + + #define INT0_CONTROL MCUCR + // #define INT0_FALLING_EDGE 0x02 + // #define INT0_RISING_EDGE 0x03 + #define INT0_FALLING_EDGE (1<