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#ifndef AUDIO_VS1011_H
#define AUDIO_VS1011_H
#include <avr/io.h>
#include <util/delay.h>
#include <inttypes.h>
#include <avr/eeprom.h>
#include "../spi.h"
/// #include "../../uart/uart.h"
/// #include "../../stdout.h"
#define audio_vs1011_enable() PORTC &= ~(1<<PC6); // <XDCS>
#define audio_vs1011_disable() PORTC |= (1<<PC6); // </XDCS>
#define audio_vs1011_isDREQ() (PIND & (1<<PD5))
#define audio_vs1011_waitDREQ(); loop_until_bit_is_set(PIND, PD5);
// [OPERATIONS]
#define VS_WRITE 0x2
#define VS_READ 0x3
// [SCI REGISTERS] - page 29
#define SCI_MODE 0x0 // Mode control
#define SCI_STATUS 0x1 // Status of VS1011e
#define SCI_BASS 0x2 // Built-in bass/treble enhancer
#define SCI_CLOCKF 0x3 // Clock freq + multiplier
#define SCI_DECODE_TIME 0x4 // Decode time in seconds
#define SCI_AUDATA 0x5 // Misc. audio data
#define SCI_WRAM 0x6 // RAM write/read
#define SCI_WRAMADDR 0x7 // Base address for RAM write/read
#define SCI_HDAT0 0x8 // Stream header data 0
#define SCI_HDAT1 0x9 // Stream header data 1
#define SCI_AIADDR 0xA // Start address of application
#define SCI_VOL 0xB // Volume control
#define SCI_AICTRL0 0xC // Application control register 0
#define SCI_AICTRL1 0xD // Application control register 1
#define SCI_AICTRL2 0xE // Application control register 2
#define SCI_AICTRL3 0xF // Application control register 3
// [VALUES::SCI_MODE]
#define SM_DIFF 0x1 // Differential
#define SM_LAYER12 0x2 // Allow MPEG layers I & II
#define SM_RESET 0x4 // Soft reset
#define SM_OUTOFWAV 0x8 // Jump out of WAV decoding
#define SM_SETTOZERO1 0x10 // set to zero
#define SM_TESTS 0x20 // Allow SDI tests
#define SM_STREAM 0x40 // Stream mode
#define SM_SETTOZERO2 0x80 // set to zero
#define SM_DACT 0x100 // DCLK active edge
#define SM_SDIORD 0x200 // SDI bit order
#define SM_SDISHARE 0x400 // Share SPI chip select
#define SM_SDINEW 0x800 // VS1002 native SPI modes
#define SM_SETTOZERO3 0x1000 // set to zero
// [VALUES::SCI_CLOCKF]
#define SC_CLK2X 0x8000 // clock doubler
#define audio_vs1011_init_xcs() PORTC &= ~(1<<PC1) // <XCS>
#define audio_vs1011_exit_xcs() PORTC |= (1<<PC1); // </XCS>
#define audio_vs1011_init_xdcs() PORTC &= ~(1<<PC2) // <XCS>
#define audio_vs1011_exit_xdcs() PORTC |= (1<<PC2); // </XCS>
#define wait4dreq() loop_until_bit_is_set(PINC, PC3); // <DREQ></DREQ>
/// void audio_vs1011_cmd(const unsigned char sci_cmd, const unsigned char hdata,
/// const unsigned char ldata);
void audio_vs1011_init();
void audio_vs1011_cmd(const unsigned char cmd, uint16_t dat);
void audio_vs1011_setVolume(const unsigned char left, const unsigned char right);
//void audio_vs1011_dat(const unsigned char dat[32]);
void audio_vs1011_dat(const unsigned char* dat, const unsigned char size);
/// unsigned char audio_vs1011_stream(unsigned char (*readfn)());
void audio_vs1011_test_sine();
void audio_vs1011_test_volume();
/// void audio_vs1011_test_eeprom();
/// void audio_vs1011_enable();
/// void audio_vs1011_disable();
/// char audio_vs1011_isDREQ();
/// void audio_vs1011_test_softreset();
#endif
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