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authorMax Christian Pohle2017-06-18 03:03:48 +0200
committerMax Christian Pohle2017-06-18 03:03:48 +0200
commitd2fdbf06caa21ec4f0c95e270408cdf83ea6e9da (patch)
tree7bb9930de9094cb8fd69acf6b3f51ffc06325d05
parent479212474d627b1572d61dad11fc5cad2c3c1580 (diff)
downloadbinwatch-mini-d2fdbf06caa21ec4f0c95e270408cdf83ea6e9da.tar.bz2
binwatch-mini-d2fdbf06caa21ec4f0c95e270408cdf83ea6e9da.zip
Added seconds with 1 bit missing
-rw-r--r--software/main.c38
1 files changed, 35 insertions, 3 deletions
diff --git a/software/main.c b/software/main.c
index 9e2cb5d..b791647 100644
--- a/software/main.c
+++ b/software/main.c
@@ -3,6 +3,7 @@
3#include <avr/io.h> 3#include <avr/io.h>
4#include <avr/interrupt.h> 4#include <avr/interrupt.h>
5#include <util/delay.h> 5#include <util/delay.h>
6#include <avr/sleep.h>
6 7
7#include "inc/int/dcf77.h" 8#include "inc/int/dcf77.h"
8 9
@@ -75,7 +76,14 @@ int main(void)
75 76
76 // MCU Control Register (controls CPU-behaviours like interrupts & sleepmode) 77 // MCU Control Register (controls CPU-behaviours like interrupts & sleepmode)
77 // MCUCR |= ~(1<<ISC01) | (1<<ISC00); // any logical change generates interrupt 78 // MCUCR |= ~(1<<ISC01) | (1<<ISC00); // any logical change generates interrupt
79
80 // set sleep mode to power-down...
81 // MCUCR &= ~(1<<SM0);
82 // MCUCR |= (1<<SM1);
83 set_sleep_mode(SLEEP_MODE_PWR_DOWN);
84
78 PCMSK |= (1<<PCINT0); 85 PCMSK |= (1<<PCINT0);
86
79 // INT0_CONTROL = INT0_RISING_EDGE; // going to toggle int0-behaviour 87 // INT0_CONTROL = INT0_RISING_EDGE; // going to toggle int0-behaviour
80 88
81 TCCR0A |= (1 << WGM01); // CTC mode 89 TCCR0A |= (1 << WGM01); // CTC mode
@@ -89,6 +97,8 @@ int main(void)
89 // OCR0A = CTC_MATCH_OVERFLOW; 97 // OCR0A = CTC_MATCH_OVERFLOW;
90 TIMSK |= (1 << OCIE0A); // if you want interrupt 98 TIMSK |= (1 << OCIE0A); // if you want interrupt
91 99
100 sleep_enable();
101 sleep_bod_disable();
92 sei(); 102 sei();
93 103
94 for(uint8_t i=0; i<16; i++) 104 for(uint8_t i=0; i<16; i++)
@@ -97,16 +107,38 @@ int main(void)
97 _delay_ms(5); 107 _delay_ms(5);
98 } 108 }
99 109
110
111 char lastsec = 0;
100 while (1) 112 while (1)
101 { 113 {
102 //print_data(lastinterval<<1 | (PINB & PB0)); 114 //print_data(lastinterval<<1 | (PINB & PB0));
115 if(lastsec != t_current.s)
116 {
117 //for (uint8_t i = 16; i > 0; i--)
118 // {
119 print_data(
120 ~(
121 (uint16_t) 0
122 // | ((uint16_t) (PINB & 0x0001))<<15
123 | t_current.h<<10
124 | t_current.m<<5
125 | t_current.s>>1)
126 );
127 _delay_us(50);
128 // }
129 lastsec = t_current.s;
130 }
103 131
104 print_data( 132 print_data(
105 (uint16_t) 0 133 (uint16_t) 0
106 | ((uint16_t) (PINB & 0x0001))<<15 134 // | ((uint16_t) (PINB & 0x0001))<<15
107 | t_current.h<<8 135 | t_current.h<<10
108 | t_current.m 136 | t_current.m<<5
137 | t_current.s>>1
109 ); 138 );
139 sleep_cpu();
140
141
110 // print_data(interval | ((PINB & PB0) == 1 ? 2 : 0)); 142 // print_data(interval | ((PINB & PB0) == 1 ? 2 : 0));
111 //print_data(PINB); 143 //print_data(PINB);
112 } 144 }
..