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-rw-r--r--.clang-format5
-rw-r--r--.ycm_extra_conf.py26
-rw-r--r--Makefile17
-rw-r--r--main.c118
4 files changed, 136 insertions, 30 deletions
diff --git a/.clang-format b/.clang-format
new file mode 100644
index 0000000..b8ecd2e
--- /dev/null
+++ b/.clang-format
@@ -0,0 +1,5 @@
1BasedOnStyle: Webkit
2IndentWidth: 2
3BreakBeforeBraces: Allman
4AllowShortIfStatementsOnASingleLine: false
5ColumnLimit: 120
diff --git a/.ycm_extra_conf.py b/.ycm_extra_conf.py
new file mode 100644
index 0000000..42834fb
--- /dev/null
+++ b/.ycm_extra_conf.py
@@ -0,0 +1,26 @@
1import os
2import ycm_core
3
4def FlagsForFile( filename, **kwargs ):
5 return {
6 'flags': [
7 '-Wall',
8 '-Wextra',
9 '-Werror',
10 '-Wno-long-long',
11 '-Wno-variadic-macros',
12 '-fexceptions',
13 '-ferror-limit=10000',
14 '-DNDEBUG',
15 '-std=c99',
16 '-x', 'c',
17 '-D_GNU_SOURCE',
18 '-D__AVR_ATtiny85__',
19 '-D__AVR__',
20 '-I.',
21 '-I', '/usr/avr/include/'
22 ],
23 'do_cache': True,
24 }
25
26# vim:set et sw=2 ts=2 tw=120:
diff --git a/Makefile b/Makefile
index e63d2c0..e81f5a1 100644
--- a/Makefile
+++ b/Makefile
@@ -1,8 +1,17 @@
1FLAGS=-Wall -I/usr/lib/gcc/avr/6.3.0/plugin/include/ -I/usr/avr/include -mmcu=attiny13 -O3 -DF_CPU=1200000 1FLAGS=-Wall -O5 -Werror
2FLAGS+=-mmcu=attiny85
3FLAGS+=-D__AVR_ATtiny85__=1
4# FLAGS+=-DF_CPU=120000UL
5# FLAGS+=-DF_CPU=960000UL
6FLAGS+=-DF_CPU=800000UL
7FLAGS+=-I inc/int/
8FLAGS+=-I/usr/lib/gcc/avr/6.3.0/plugin/include/
9FLAGS+=-I/usr/avr/include
10
11program: all
12 avrdude -V -B100 -p t85 -c avrisp2 -P usb -U flash:w:main.hex
2 13
3all: 14all:
4 avr-gcc $(FLAGS) -o main.elf main.c 15 avr-gcc $(FLAGS) -o main.elf main.c inc/int/dcf77.c
5 avr-objcopy -j .text -j .data -O ihex main.elf main.hex 16 avr-objcopy -j .text -j .data -O ihex main.elf main.hex
6 17
7program: all
8 avrdude -B100 -p t85 -c avrisp2 -P usb -U flash:w:main.hex
diff --git a/main.c b/main.c
index 2b5753d..2dd8058 100644
--- a/main.c
+++ b/main.c
@@ -1,15 +1,12 @@
1// vim:set et sw=2 ts=2 tw=120: 1// vim:set et sw=2 ts=2 tw=120:
2#define __AVR_ATtiny85__ 2#include <stdint.h>
3#include <avr/io.h>
3#include <avr/interrupt.h> 4#include <avr/interrupt.h>
4#include <avr/io.h> // (1) 5#include <util/delay.h>
5 6
6#ifndef F_CPU 7#include "inc/int/dcf77.h"
7#warning "F_CPU war noch nicht definiert, wird nun mit 3686400 definiert"
8#define F_CPU 1000000UL
9#endif
10 8
11#include <stdint.h> 9#define CTC_MATCH_OVERFLOW ((F_CPU / 1000) / 8)
12#include <util/delay.h>
13 10
14// set bit 11// set bit
15static inline void BIT_SET(volatile uint8_t* target, uint8_t bit) __attribute__((always_inline)); 12static inline void BIT_SET(volatile uint8_t* target, uint8_t bit) __attribute__((always_inline));
@@ -19,52 +16,121 @@ static inline void BIT_SET(volatile uint8_t* target, uint8_t bit) { *target |= (
19static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) __attribute__((always_inline)); 16static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) __attribute__((always_inline));
20static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) { *target &= ~(1 << bit); }; 17static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) { *target &= ~(1 << bit); };
21 18
19
20/*
21 *
22 * PB2 : connected to ShiftClock on Port 11
23 * PB3 : connected to MemoryClock on Port 12 (shows content of memory)
24 * PB4 (PIN3) : connected to SERIAL_IN on pin 14
25 *
26 */
27
22void pulse_sck() 28void pulse_sck()
23{ 29{
24 PORTB |= (1 << PB2); 30 PORTB |= (1 << PB2);
25 _delay_ms(10); // Eine Sekunde +/-1/10000 Sekunde warten...
26 PORTB ^= (1 << PB2); 31 PORTB ^= (1 << PB2);
32
27} 33}
28 34
29void print_data(uint16_t data) 35void print_data(uint16_t data)
30{ 36{
31 BIT_CLEAR(&PORTB, PB4); 37 //BIT_CLEAR(&PORTB, PB4);
32 _delay_ms(50); 38 //BIT_SET(&PORTB, PB4);
33 BIT_SET(&PORTB, PB4);
34 39
35 for (uint16_t i = 0; i < 16; i++) 40 for (uint16_t i = 0; i < 16; i++)
36 { 41 {
37 data & 0x1 << i ? BIT_SET(&PORTB, PB4) : BIT_CLEAR(&PORTB, PB4); 42 data & 0x1 << i
43 ? BIT_SET(&PORTB, PB4)
44 : BIT_CLEAR(&PORTB, PB4);
38 pulse_sck(); 45 pulse_sck();
39 } 46 }
40 47 //BIT_CLEAR(&PORTB, PB4);
48 // pulse_sck();
41 BIT_CLEAR(&PORTB, PB3); 49 BIT_CLEAR(&PORTB, PB3);
42 _delay_ms(50);
43 BIT_SET(&PORTB, PB3); 50 BIT_SET(&PORTB, PB3);
51
44} 52}
45 53
46int main(void) 54int main(void)
47{ 55{
48 DDRB = 0xFF;
49 56
50 BIT_CLEAR(&PORTB, PB5); 57 BIT_CLEAR(&PORTB, PB5);
51 _delay_ms(200); 58 _delay_ms(20);
52 BIT_SET(&PORTB, PB5); 59 BIT_SET(&PORTB, PB5);
53 BIT_CLEAR(&PORTB, PB5); 60 BIT_CLEAR(&PORTB, PB5);
54 _delay_ms(200); 61 _delay_ms(20);
55 BIT_SET(&PORTB, PB5); 62 BIT_SET(&PORTB, PB5);
56 63
64
65
66 // make all pins output pins...
67 DDRB = 0xFF;
68 DDRB &= ~(1 << PB0); // makes PB0 an input pin (INT0)
69 PORTB |= (1 << PB0); // activate input resistor
70
71 // activate dcf77-receiver...
72 PORTB &= (1 << PB1); // sets PB1 to low
73 _delay_ms(20);
74 PORTB &= ~(1 << PB1); // sets PB1 to low
75
76
77 cli();
78
79 /*
80 GIMSK |= (1<<INT0); // External Interrupt Request 0 Enable
81 GIMSK |= (1<<PCIE); // Pin Change Interrupt Enable
82
83 // MCU Control Register (controls CPU-behaviours like interrupts & sleepmode)
84 MCUCR |= ~(1<<ISC01) | (1<<ISC00); // any logical change generates interrupt
85 PCMSK |= (1<<PCINT0);
86 // INT0_CONTROL = INT0_RISING_EDGE; // going to toggle int0-behaviour
87 */
88
89 TCCR0A |= (1 << WGM01); // CTC mode
90 // TCCR0B |= (1 << CS00);
91 TCCR0B |= (1 << CS01); // Prescaler 8
92 // TCCR0B |= (1 << CS02); // Prescaler 256
93 // OCR0A |= (1 << WGM01); // CTC mode
94
95 // OCR0A = 149;
96 OCR0A = 124;
97 // OCR0A = CTC_MATCH_OVERFLOW;
98 TIMSK |= (1 << OCIE0A); // if you want interrupt
99
100 sei();
101
57 while (1) 102 while (1)
58 { // Endlosschleife 103 {
104 // uint16_t t = 1;
105 // for (uint16_t i=0; i<16; i++)
106 // {
107 print_data(t_current.s);
108 // t = t<<1;
109 // }
110 // print_data(t_current.s);
59 111
60 uint16_t data = 1;
61 for (; data < UINT16_MAX; data++)
62 {
63 // clear register (reset)
64 print_data(data | data << 6);
65 }
66 112
67 _delay_ms(1000); // Eine Sekunde +/-1/10000 Sekunde warten... 113 /*
114 print_data(0xFFFF);
115 _delay_ms(1000);
116 print_data(0x0000);
117 _delay_ms(1000);
118 */
68 } 119 }
69 return 0; 120 return 0;
70} 121}
122
123
124/*
125for(uint16_t hour=0; hour<24; hour++)
126 for(uint16_t minute=0; minute<60; minute++)
127 for (uint16_t second = 1; second < 60; second++)
128 {
129 // clear register (reset)
130 // print_data(hour<< 12 | minute << 6 | second);
131 // print_data((int64_t) dcf77);
132 // dcf77[dcf77_bit].bit == 1
133 // ? print_data(0xFFFF)
134 // : print_data(0x0000);
135 }A
136*/
..