diff options
Diffstat (limited to 'main.c')
-rw-r--r-- | main.c | 49 |
1 files changed, 23 insertions, 26 deletions
@@ -25,30 +25,19 @@ static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) { *target &= | |||
25 | * | 25 | * |
26 | */ | 26 | */ |
27 | 27 | ||
28 | void pulse_sck() | ||
29 | { | ||
30 | PORTB |= (1 << PB2); | ||
31 | PORTB ^= (1 << PB2); | ||
32 | |||
33 | } | ||
34 | |||
35 | void print_data(uint16_t data) | 28 | void print_data(uint16_t data) |
36 | { | 29 | { |
37 | //BIT_CLEAR(&PORTB, PB4); | 30 | BIT_CLEAR(&PORTB, PB3); |
38 | //BIT_SET(&PORTB, PB4); | 31 | for (char i = 0; i < 16; i++) |
39 | |||
40 | for (uint16_t i = 0; i < 16; i++) | ||
41 | { | 32 | { |
42 | data & 0x1 << i | 33 | data & 0x1 << i |
43 | ? BIT_SET(&PORTB, PB4) | 34 | ? BIT_SET(&PORTB, PB4) |
44 | : BIT_CLEAR(&PORTB, PB4); | 35 | : BIT_CLEAR(&PORTB, PB4); |
45 | pulse_sck(); | 36 | // pulse sck... |
37 | BIT_SET(&PORTB, PB2); | ||
38 | BIT_CLEAR(&PORTB, PB2); | ||
46 | } | 39 | } |
47 | //BIT_CLEAR(&PORTB, PB4); | ||
48 | // pulse_sck(); | ||
49 | BIT_CLEAR(&PORTB, PB3); | ||
50 | BIT_SET(&PORTB, PB3); | 40 | BIT_SET(&PORTB, PB3); |
51 | |||
52 | } | 41 | } |
53 | 42 | ||
54 | int main(void) | 43 | int main(void) |
@@ -64,27 +53,29 @@ int main(void) | |||
64 | 53 | ||
65 | 54 | ||
66 | // make all pins output pins... | 55 | // make all pins output pins... |
67 | DDRB = 0xFF; | 56 | // DDRB = 0xFF; |
68 | DDRB &= ~(1 << PB0); // makes PB0 an input pin (INT0) | 57 | DDRB = 0b11111110; |
69 | PORTB |= (1 << PB0); // activate input resistor | 58 | PORTB |= 1<<PB0; // activate pullup |
59 | PORTB |= 1<<PB1; // activate receiver | ||
60 | |||
61 | // DDRB &= ~(1 << PB0); // makes PB0 an input pin (INT0) | ||
62 | // PORTB |= (1 << PB0); // activate input resistor | ||
70 | 63 | ||
71 | // activate dcf77-receiver... | 64 | // activate dcf77-receiver... |
72 | PORTB &= (1 << PB1); // sets PB1 to low | 65 | // PORTB &= (1 << PB1); // sets PB1 to low |
73 | _delay_ms(20); | 66 | // _delay_ms(20); |
74 | PORTB &= ~(1 << PB1); // sets PB1 to low | 67 | // PORTB &= ~(1 << PB1); // sets PB1 to low |
75 | 68 | ||
76 | 69 | ||
77 | cli(); | 70 | cli(); |
78 | 71 | ||
79 | /* | ||
80 | GIMSK |= (1<<INT0); // External Interrupt Request 0 Enable | 72 | GIMSK |= (1<<INT0); // External Interrupt Request 0 Enable |
81 | GIMSK |= (1<<PCIE); // Pin Change Interrupt Enable | 73 | GIMSK |= (1<<PCIE); // Pin Change Interrupt Enable |
82 | 74 | ||
83 | // MCU Control Register (controls CPU-behaviours like interrupts & sleepmode) | 75 | // MCU Control Register (controls CPU-behaviours like interrupts & sleepmode) |
84 | MCUCR |= ~(1<<ISC01) | (1<<ISC00); // any logical change generates interrupt | 76 | // MCUCR |= ~(1<<ISC01) | (1<<ISC00); // any logical change generates interrupt |
85 | PCMSK |= (1<<PCINT0); | 77 | PCMSK |= (1<<PCINT0); |
86 | // INT0_CONTROL = INT0_RISING_EDGE; // going to toggle int0-behaviour | 78 | // INT0_CONTROL = INT0_RISING_EDGE; // going to toggle int0-behaviour |
87 | */ | ||
88 | 79 | ||
89 | TCCR0A |= (1 << WGM01); // CTC mode | 80 | TCCR0A |= (1 << WGM01); // CTC mode |
90 | // TCCR0B |= (1 << CS00); | 81 | // TCCR0B |= (1 << CS00); |
@@ -104,7 +95,13 @@ int main(void) | |||
104 | // uint16_t t = 1; | 95 | // uint16_t t = 1; |
105 | // for (uint16_t i=0; i<16; i++) | 96 | // for (uint16_t i=0; i<16; i++) |
106 | // { | 97 | // { |
107 | print_data(t_current.s); | 98 | // print_data(t_current.s); |
99 | // uint16_t p = 0; | ||
100 | // for(int i=0; i<sizeof(t_current.s)*__CHAR_BIT__; i++) | ||
101 | // p |= t_current.s & (1<<i); | ||
102 | |||
103 | print_data(t_current.s); | ||
104 | // print_data(t_current.s<<10 | interval | ((PINB & PB0) == 1 ? 2 : 0)); | ||
108 | // t = t<<1; | 105 | // t = t<<1; |
109 | // } | 106 | // } |
110 | // print_data(t_current.s); | 107 | // print_data(t_current.s); |