1 files changed, 129 insertions, 0 deletions

diff --git a/software/main.c b/software/main.c
new file mode 100644
index 0000000..9e2cb5d
--- /dev/null
+++ b/software/main.c
@@ -0,0 +1,129 @@
+// vim:set et sw=2 ts=2 tw=120:
+#include <stdint.h>
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+
+#include "inc/int/dcf77.h"
+
+#define CTC_MATCH_OVERFLOW ((F_CPU / 1000) / 8)
+
+// set bit
+static inline void BIT_SET(volatile uint8_t* target, uint8_t bit) __attribute__((always_inline));
+static inline void BIT_SET(volatile uint8_t* target, uint8_t bit) { *target |= (1 << bit); };
+
+// set clear
+static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) __attribute__((always_inline));
+static inline void BIT_CLEAR(volatile uint8_t* target, uint8_t bit) { *target &= ~(1 << bit); };
+
+
+/*
+ * 
+ * PB2        : connected to ShiftClock on Port 11
+ * PB3        : connected to MemoryClock on Port 12 (shows content of memory)
+ * PB4 (PIN3) : connected to SERIAL_IN on pin 14
+ *
+ */
+
+void print_data(uint16_t data)
+{
+  BIT_CLEAR(&PORTB, PB3);
+  for (char i = 0; i < 16; i++)
+  {
+    data & 0x1 << i
+      ? BIT_SET(&PORTB, PB4)
+      : BIT_CLEAR(&PORTB, PB4);
+    // pulse sck...
+    BIT_SET(&PORTB, PB2);
+    BIT_CLEAR(&PORTB, PB2);
+  }
+  BIT_SET(&PORTB, PB3);
+}
+
+int main(void)
+{
+
+  BIT_CLEAR(&PORTB, PB5);
+  _delay_ms(20);
+  BIT_SET(&PORTB, PB5);
+  BIT_CLEAR(&PORTB, PB5);
+  _delay_ms(20);
+  BIT_SET(&PORTB, PB5);
+
+
+
+  // make all pins output pins...
+  // DDRB  = 0xFF;
+  DDRB   = 0b11111110;
+  PORTB |= 1<<PB0; // activate pullup
+  PORTB |= 1<<PB1; // activate receiver
+  PORTB &= ~(1<<PB1);
+
+  // DDRB &= ~(1 << PB0); // makes PB0 an input pin (INT0)
+  // PORTB |= (1 << PB0); // activate input resistor
+
+  // activate dcf77-receiver...
+  // PORTB &=  (1 << PB1); // sets PB1 to low
+  // _delay_ms(20);
+  // PORTB &= ~(1 << PB1); // sets PB1 to low
+
+
+  cli();
+
+  GIMSK |= (1<<INT0); // External Interrupt Request 0 Enable
+  GIMSK |= (1<<PCIE); // Pin Change Interrupt Enable
+
+  // MCU Control Register (controls CPU-behaviours like interrupts & sleepmode)
+  // MCUCR |= ~(1<<ISC01) | (1<<ISC00); // any logical change generates interrupt
+  PCMSK |= (1<<PCINT0);
+  // INT0_CONTROL = INT0_RISING_EDGE; // going to toggle int0-behaviour
+
+  TCCR0A |= (1 << WGM01);              // CTC mode
+  // TCCR0B |= (1 << CS00);
+  TCCR0B |= (1 << CS01);               // Prescaler 8
+  // TCCR0B |= (1 << CS02);               // Prescaler 256
+  // OCR0A  |= (1 << WGM01);              // CTC mode
+
+  // OCR0A   = 149;
+  OCR0A   = 125;
+  // OCR0A   = CTC_MATCH_OVERFLOW;
+  TIMSK  |= (1 << OCIE0A);             // if you want interrupt
+
+  sei();
+
+  for(uint8_t i=0; i<16; i++)
+  {
+    print_data(3<<i);
+    _delay_ms(5);
+  }
+
+  while (1)
+  {
+    //print_data(lastinterval<<1 | (PINB & PB0));
+
+    print_data(
+        (uint16_t) 0
+        | ((uint16_t) (PINB & 0x0001))<<15
+        | t_current.h<<8
+        | t_current.m
+        );
+    // print_data(interval | ((PINB & PB0) == 1 ? 2 : 0));
+    //print_data(PINB);
+  }
+  return 0;
+}
+
+
+/*
+for(uint16_t hour=0; hour<24; hour++)
+  for(uint16_t minute=0; minute<60; minute++)
+    for (uint16_t second = 1; second < 60; second++)
+    {
+      // clear register (reset)
+      // print_data(hour<< 12 | minute << 6 | second);
+      // print_data((int64_t) dcf77);
+      // dcf77[dcf77_bit].bit == 1
+      //   ? print_data(0xFFFF)
+      //   : print_data(0x0000);
+    }A
+*/